Overview / Usage

EEsim is an open-source browser-based simulation tool, created Created by Dr Danial Chitnis of Electronics and Electrical Engineering at The University of Edinburgh, for electrical and electronic circuit analysis. EEsim’s input is a SPICE compatible netlist, and the output is a plot of current and voltage nodes, information on the simulation results, and a downloadable CSV file for further analysis in external popular analysis software packages such as Numpy and Python. Since the input netlist is text-based, it has the advantage of version control via GitHub, easy sharing, scripting, and automation. The backend of EEsim is based on ngspice, and all the computation happens inside the browser using WebAssembly (WASM) technology. Additionally, it respects user privacy since no data leaves the browser’s sandboxed environment. EEsim offers a convenient tool for brainstorming and sharing of circuit simulation with a modern UX/UI contributing to the growing community of the open-source integrated circuit hardware.

Methodology / Approach

EEsim is a circuit simulator based on ngspice and it runs inside the browser using WebAssembly technology. The input is spice based netlist, and the output is result of the analysis that you're doing in the simulations. You are able to plot and view the results directly in the browser using high-performance WebGL plotting library webgl-plot, or download the data in CSV format for further analysis. Notice that your netlist and results are processed locally and always remain inside your browser and are never uploaded to the network. The focus of this implementation is rapid analysis, sharing circuits ideas and results in VLSI and chip-design communities.

Repository

https://github.com/danchitnis/EEsim

Other links

• EEsim.dev
• Open Education