Overview / Usage

This project is all about defining an perfect architecture model for DPC to run on CPU,GPU and FPGA respectively and the main use of the program is to help people to solve their business complexities in making currency and this works on CUDA_event release for parallel hardware components in processing which is a single source of methodolgy of Data paralleling of C environment defined for developers in the world for one API to implement and reduce the complexity, budget and maintenance of the metrics i.e performance of the application.

Methodology / Approach

This application is all about helping the DCP programmers to help them to solve many typical computational issues to solve more efficient on a CPU based and every DCP program build on the SYCL specification that is Khorons group and this DevCloud one API is used for spatial CPGA satellite rador communication to the earth and the MVC model which used here is OOCA portability model which also used as a framework and the FPGA high synthesis level can be obtained using CUDA and this trains AI and ML learning models for Software Algorithms and the code higher productivity in CPU is

cudaMalloc((*void*)&dev,bitmap,bitmap.image_size());

dim3 grid(DIM,DIM);

cudacpymemdevtohost();

In the above CUDA_event occurs for memory initialization and business logic transferred to host for better Business productivity.

Technologies Used

Software:

Intel oneAPI Base Toolkit

- Intel oneAPI DPC++ Compiler
- Intel Distribution for GDB
- Intel Advisor
- Intel VTune Profiler

• CMake
• Visual Studio Code

Hardware:

• Intel Iris Xe (Gen11) GPU
• Intel Iris Xe MAX GPU
• Intel Xe-HP GPU
• Argonne National Laboratory's JLSE Testbeds

Documents and Presentations

Repository

https://github.com/KastnerRG/Read_the_docs/blob/master/docs/project6.rst